This position serves as the software team lead for Zero ASIC’s unified software solution that integrates FPGA hardware model generation with a complete RTL-to-bitstream FPGA design automation flow. The Principal Software Architect will synthesize high-level FPGA hardware-software codesign requirements into a viable software product that can be deployed for end use by third parties.
Translate top level FPGA EDA software requirements into detailed requirements suitable for guiding production implementation.
Guide junior software engineers in FPGA EDA software implementation
Lead team code reviews, establish team best practices
Lead development of software documentation
Work closely with FPGA chip design team to ensure smooth handoff and tight integration
BS in Computer Science or Computer Engineering
10+ years of hands-on experience (professional and/or relevant academic research) in electronic design automation software development
Experience in deploying software products to the field
Experience leading small teams of software engineers
Strong background in Python and C++