Senior Verification Engineer

As Senior Verification Engineer, you will be responsible for development of Zero ASIC’s verification methodology, infrastructure and implementation. You will be a strong contributor on a small team focused on designing, fabricating, and testing Zero ASIC chiplets and SoCs.


  • Drive define and implementation of a holistic verification framework for multiple, diverse chips being designed in the team

  • Implement various verification environments using both commercial and open source tool suites, tailored to the needs of the different designs

  • Ensure high quality design for tapeout

  • Collaborate with the design and system team on product definitions


  • Bachelor’s degree in Computer Science, Electrical Engineering, or related field

  • 10+ years of industry/academic experience in design verification

  • Experience with verification tools, methodologies and implementation

  • Experience with formal verification

  • Strong programming/scripting skills

  • Strong interpersonal, teamwork, and communication skills

  • Highly creative and self-driven

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