Join the Chip Design Revolution

It’s been nearly 50 years since Mead and Conway launched the first VLSI Revolution¹, sparking decades of extraordinary innovation and growth. Unfortunately, over the last 15 years, chip design has become a rich man’s game requiring thousands of specialists and up to $1  billion in per project funding. We believe the industry is long overdue for a second chip design revolution!

Since 2020, Zero ASIC has been quietly reinventing chip design from the ground up. Today, I’m excited to share that we are closing out the year profitable and are poised to enter a major growth phase that gives us a real shot at revolutionzing silicon system design.

If everything goes according to plan, over the next few years Zero ASIC will deliver:

• 24-hour deterministic RTL-to-GDS compilation cycles
• 24-hour SiP device build-and-ship cycles
• A portfolio of off-the-shelf, high-performance chiplets
• A composable, chiplet-based open-standard FPGA
• Real-time silicon system digital twin emulation

If you’re passionate about democratizing silicon and have exceptional skills, you should seriously consider joining our team. I can promise you, there is no other company in the industry quite like Zero ASIC.

Zero ASIC can legitimately claim to be the pound-for-pound world champion in open chip design innovation and is the only semiconductor company where every engineer is required to contribute to open source projects.

Check out the careers page to find areas where we need help. The list is by no means limiting. I have been known to make some fairly crazy hires based on talent alone. If you are passionate about democratizing silicon and can contribute from day one, I want to talk to you.

Vive la Révolution!

About Zero ASIC

Zero ASIC is a semiconductor startup based in Cambridge, Massachusetts. The company mission is to democratize access to silicon through chiplets and design automation. Zero ASIC is building the world’s first composable chiplet platform, enabling billions of unique silicon systems to be assembled in hours from a catalog of off-the-shelf chiplets.

References

Footnotes

1. Mead–Conway VLSI chip design revolution, https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_design_revolution ↩