EFABRIC

Introduction

The EFABRIC is an active silicon interposer integrating networking functionality, 3D CLINK chiplet interfaces, and 2D UCIe chiplet interfaces.

Block diagram

Core Features

  • Network-On-Interposer
  • 4 Tbps aggregate bisection bandwidth
  • 64 in-order dual-issue RISC-V CPU cores
  • 16 MB distributed SRAM
  • Up to 1GHz operating frequency
  • <0.1 pJ/bit 3D link energy efficiency

Connectivity Features

ProtocolQuantity
CLINK 3D links (128 Gbps)64
UCIE 2D links (128 Gbps)32
GPIO256
UART16
I2C16
SDIO16
SPI16
QSPI16
PWM16
ETH 10/100/10004
JTAG1

Chiplet Dimensions

  • 10mm x 10mm

Status & Availability

StageStatus
Emulation (partial)Available
Test ChipQ1, 2024
Device SamplingQ3, 2024
©2023 by Zero ASIC Corporation. All rights reserved.
Terms | Privacy