Zero ASIC (Cambridge, Massachusetts) is a semiconductor startup developing the world’s first composable chiplet platform. If successful, we will democratize access to silicon by reducing the cost and time of ASIC development by a factor of 100x.

Founded in 2008 as Adapteva, the company pioneered manycore computing with its Epiphany architecture, achieving milestones such as a 1024-core 16nm tapeout and demonstrating industry-leading energy efficiency (50 GFLOPS/W).

In 2020, we became Zero ASIC, shifting our focus to building the world’s first composable chiplet platform. Since then, we have delivered several open-source tools, including SiliconCompiler, Logik, and UMI as part of our larger effort to advance chiplet-based design.