LogikBench
LogikBench is a parameterized RTL benchmark suite designed to provide unbiased evaluation of:
- EDA tools
- Design flows
- Foundry processes
- IP libraries
- FPGA devices
- Processing architectures
LogikBench addresses a number of gaps in existing RTL benchmark suites, including:
- Small datasets
- Hard coded circuit sizes
- Limited circuit diversity
- Ambiguous licenses
- No execution infrastructure
- No standard metrics
- No standard data sets (“no imagenet for EDA”)
- No standard scores (“no SpecInt/Dhrystone for EDA”)
- Limited benchmark provenance (“who wrote it”)
LogikBench includes over 100 different parameterized benchmark circuits split into five groupings. The number of groups and total benchmark counts are expected to grow significantly over time.
| Group | Benchmarks | Description |
|---|---|---|
| basic | 23 | Logic (mux, encoder, arbiter, crossbar, …) |
| arithmetic | 33 | Arithmetic (add, shift, mul, …) |
| memory | 12 | Memory (sp, dp, sdp, fifo, …) |
| blocks | 30 | Subsystems (fpu, spi ,picorv32, …) |
| epfl | 19 | EPFL benchmarks |
To learn more about LogikBench, please visit the GitHub repo.